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for power management application 1 ver. 1. 3 , 2014- 06 - 01 control integrated power system (cipos?) i k cm 30f 60 h a datasheet
cipos? i k cm 30f 60 h a datasheet 2 ver. 1. 3 , 2014 - 06 - 01 table of c ontents cipos? c ontrol i ntegrated p o wer system ........................................................................................................ 3 features .............................................................................................................................................................. 3 target applications ........................................................................................................................................... 3 description ......................................................................................................................................................... 3 system configuration ....................................................................................................................................... 3 pin configuration .................................................................................................................................................... 4 internal electrical schematic ................................................................................................................................. 4 pin assignment ....................................................................................................................................................... 5 pin description .................................................................................................................................................. 5 absolute maximum ratings ................................................................................................................................... 7 module section .................................................................................................................................................. 7 inverter section .................................................................................................................................................. 7 control section .................................................................................................................................................. 7 recommended operation conditions .................................................................................................................. 8 static parameters ................................................................................................................................................... 9 dynamic parameters ............................................................................................................................................ 10 bootstrap parameters .......................................................................................................................................... 10 mechanical characteristics and ratings ............................................................................................................ 11 circuit of a typical application ........................................................................................................................... 12 switching times definition .................................................................................................................................. 12 electrical characteristic ....................................................................................................................................... 13 package outline .................................................................................................................................................... 14
cipos? i k cm 30f 60 h a datasheet 3 ver. 1. 3 , 2014 - 06 - 01 cipos? c o ntrol i n tegrated p o wer s ystem dual in- line intelligent power module 3 - bridge 600v / 30a features fully isolated dual in - line molded module ? ? ? ? ? ? ? ? ? ? target applications ? ? ? ? ? ? description the cipos? module family offers the chance for integrating various power and control components to increase reliability, optimie pcb sie and system costs. it is designed to control three phase ac motors and permanent magnet motors in variable speed drives for applications like an air conditioning, a refrigerator and a washing machine. the package concept is specially adapt ed to power applications, which need good thermal conduction and electrical isolation, but also emi - save c ontrol and overload protection. trenchstop igbts and anti parallel diodes are combined with a n optimied soi gate driver for excellent electrical performance. system configuration ? ? 3 soi gate driver ?
cipos? i k cm 30f 60 h a datasheet 4 ver. 1. 3 , 2014 - 06 - 01 pin configuration bottom view figure 1 : pin configuration internal electrical schematic figure 2 : internal s chematic
cipos? i k cm 30f 60 h a datasheet 5 ver. 1. 3 , 2014 - 06 - 01 pin assignment pin number pin name pin description v - ae ig ide loating ic ul oet voltage v - ae ig ide loating ic ul voltage 3 vv v - ae ig ide loating ic ul oet voltage v v v - ae ig ide loating ic ul voltage v - ae ig ide loating ic ul oet voltage 6 v - ae ig ide loating ic ul voltage i - ae ig ide gate driver i nut i v v - ae ig ide gate driver i nut i - ae ig ide gate driver i nut 0 li - ae low ide gate driver i nut li v v - ae low ide gate driver i nut li - ae low ide gate driver i nut 3 vdd low ide ontrol ul v ault outut i ip ver urrent utdown inut 6 v low ide ontrol negative ul - ae l ow ide eitter v v - ae low ide eitter - ae low ide eitter 0 motor - ae outut v motor v - ae outut motor - ae outut 3 p p oitive bu inut voltage c o connetion pin description hin (u,v,w) and lin (u,v,w) (low side and high side control pins, pin 7 - 12) these pins are positive logic and they are responsible for the control of the integrated igbt . the schmitt - trigger input threshold s of them are such to guarantee lsttl and cmos compatibility down to 3.3v controller outputs. pull - down resistor of about 5 k ? t ili e ilter at aording to igure u z = 10 . 5 v input noise filter ? k 5 schmitt - trigger s?itch level v ih ; v il linx hinx figure 3 : input pin structure hin lin ho lo low high t ili t ili a b i li l figure 4 : input filter timing diagram
cipos? i k cm 30f 60 h a datasheet 6 ver. 1. 3 , 2014 - 06 - 01 it is recommended for proper work of cipos? not to provide input pulse - width lower than 1us. the integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on - state of two gate drivers of the same leg (i.e. ho1 and lo1, ho2 and lo2, ho3 and lo3). when two inputs of a same leg are activated, only former activated one is activated so that the leg is kept steadily in a safe state. a minim um deadtime insertion of typ ically 380 ns is also provided by driver ic , in order to reduce cross - conduction of the external power switches. vfo ( fault - output , pin 1 4) the vfo pin indicates a module failure in case of under voltage at pin vdd or in case of triggered over current detection at itrip. figure 5 : internal c ircuit at pin vfo itrip (over c urrent detection function, pin 1 5 ) cipos? provides an over current detection function by connecting the itrip input with the motor current feedback. the itrip comparator threshold (typ . 0.4 7 v) is referenced to vss ground. a n input noise filter (typ: t iipmi 3 0 n revent te driver to detet ale over - urrent event ve r urrent detetion generate a ut down o all outut o te gate driver ater te utdown roagation dela o tiall 00 0n e ault - lear tie i et to tial 6 u vdd , vss ( l ow side control supply and reference , pin 1 3 , 1 6 ) v dd is the low side supply and it provides power both to input logic and to low side output power stage. input logic is referenced to vss ground. the under - voltage circuit enables the device to operate at power on when a supply voltage of at least a typical v oltage of v dd v v i reent e ic ut down all te gate driver ower outut wen te v dd ul voltage i below v ddv- 0 v i revent te external ower wite ro ritiall low gate voltage level during on - tate and tereore ro exeive ower diiation vb (u , v , w) and vs (u , v , w) (high side supplies, pin 1 - 6 ) vb to vs is the high side supply voltage. the high side circuit can float with respect to vss following the external high side power device emitter voltage. due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. the u nder - voltage detection operates with a rising supply threshold of typical v v v and a alling treold o v v- 0 v v v rovide a ig robutne againt negative v oltage in reet o v o - 0 v tranientl i enure ver table deign even under roug ondition n w , n v, n u ( l ow side emitter, pin 17 - 19) the low side emitters are available for current measurements of each phase leg. it is recommended to keep the connection to pin vss as short as possible in order to avoid unnecessary inductive voltage drops. w , v, u ( high side emitter and low side collector , pin 20 - 22) these pins are motor u, v, w input pins p ( p ositive bus input voltage, pin 2 3 ) the high side igbt are connected to the bus voltage. it is note d that the bus voltage does not exceed 4 5 0 v. vfo cipos? vss 1 from uv - detection v dd r on , flt from itrip - latch
cipos? i k cm 30f 60 h a datasheet 7 ver. 1. 3 , 2014 - 06 - 01 absolute maximum ratings ( v dd = 15v and t j = 25c, if not stated otherwise) module section description condition symbol value unit min max storage temperature range t stg - 40 125 c insulation test voltage rms, f = 6 0h, t =1min v isol 2 0 00 - v operating case temperature range refer to figure 6 t c - 4 0 1 00 c inverter section description condition symbol value unit min max max. blocking voltage i c = 250 a v ces 600 - v dc link supply voltage of p - n applied between p - n v pn - 450 v dc link supply voltage (surge) of p - n applied between p - n v pn(surge) - 500 v o utput current t c = 25c , t j 150 c t c = 80c , t j 150 c i c - 30 - 2 0 30 2 0 a maximum peak output current less than 1ms i c - 6 0 6 0 a short circuit withstand time 1 v dc control section description condition symbol value unit min max module supply voltage v dd - 1 20 v high side floating supply voltage (vb vs. vs) v bs - 1 20 v input voltage lin, hin, itrip v in v itrip - 1 - 1 10 10 v s witching freuency f pwm - 20 kh 1 allowed number of short circuits: 1000 time between short circuits: 1s .
cipos? i k cm 30f 60 h a datasheet 8 ver. 1. 3 , 2014 - 06 - 01 recommended operation conditions all voltages are absolute voltages referenced to v ss - p otential unless otherwise specified. description symbol value unit min typ max dc link supply voltage of p - n v pn 0 - 400 v high side floating supply voltage (v b vs. v s ) v bs 13.5 - 1 8 .5 v low side supply voltage v dd 14.5 16 1 8 .5 v control supply variation figure 6 : t c measurement po int 1 1 a ny measurement except for the specified point in figure 6 is not relevant for the temperature verification and brings wrong or different information .
cipos? i k cm 30f 60 h a datasheet 9 ver. 1. 3 , 2014 - 06 - 01 static parameters ( v dd = 15v and t j = 25c, if not stated otherwise) description condition symbol value unit min typ max collector - emitter saturation voltage i out = 20 a t j = 25c 150c v ce(sat) - - 1. 55 1. 85 2. 05 - v emitter - collector forward voltage i out = - 20 a t j = 25c 150c v f - - 1. 55 1. 6 2.05 v collector - emitter l eakage current v ce = 60 0v i ces - - 1 m a logic 1 input voltage (lin,hin) v ih - 2.1 2. 5 v logic 0 input voltage (lin,hin) v il 0.7 0. 9 - v itrip positive going threshold v it,th 400 4 7 0 540 mv itrip input hysteresis v it,hs 40 70 - mv v dd and v ul under voltage oitive going treold v ddv v v 0 30 v v dd and v ul under voltage negative going treold v ddv- v v- 0 v v dd and v ul under voltage loout terei v ddv v v 0 - v inut la voltage i li iip iin a v iclamp 0 0 v uieent v x ul urrent v x onl i 0v i - 3 0 0 00 a uieent v dd ul urrent vdd onl l i 0v i v i dd - 30 00 a inut bia urrent v i v i i - a inut bia urrent v i 0v i i - - - a iip i nut bia urrent v iip v i iip - 6 0 a v inut bia urrent v v v iip 0 v i - - n a v outut voltage i 0a v iip v v - 0 - v
cipos? i k cm 30f 60 h a datasheet 10 ver. 1. 3 , 2014 - 06 - 01 dynamic parameters ( v dd = 15v and t j = 25c, if not stated otherwise) description condition symbol value unit min typ max turn - on propagation delay time v lin,hin = 5 v i out = 20 a , v dc = 300v t on - 6 0 0 - ns turn - on rise time t r - 45 - ns turn - on switching time t c (on) 180 ns reverse recovery time t rr 150 ns turn - off propagation delay time v lin,hin = 0 v i out = 20 a , v dc = 300v t off - 900 - n s turn - o ff fall time t f - 400 - ns turn - o ff switching time t c (o ff ) 140 ns short circuit propagation delay time from v it,th to 1 0% i sc t scp - 1470 - n s input filter time itrip v itrip = 1v t itripmin 530 ns input filter time at lin , hin for turn on and off v lin,hin = 0 v 5v t filin 2 9 0 - ns fault clear time after itrip - fault v itrip = 1 v t fltclr 40 6 5 200 s d eadtime between low side and high side dt pwm 2.0 - - s deadtime of gate drive circuit dt ic 3 80 ns igbt t urn - on e nergy (includes reverse recovery of diode) v dc = 300v , i c = 20 a, t j = 25c 150c e on - - 698 960 - - j igbt t urn - o ff e nergy v dc = 300v , i c = 20 a, t j = 25c 150c e off - - 435 620 - - j diode recovery e nergy v dc = 300v , i c = 20 a, t j = 25c 150c e rec - - 95 174 - - j bootstrap parameters (t j = 25c, if not stated otherwise) description condition symbol value unit min typ max repetitive peak reverse voltage v rrm 600 v bootstrap resistance of u - phase 1 vs2 or vs3 = 300v, t j = 25c vs2 and vs3 = 0v, t j = 25c vs2 or vs3 = 300v, t j = 1 25c vs2 and vs3 = 0v, t j = 1 25c r bs1 35 40 50 65 ?
cipos? i k cm 30f 60 h a datasheet 11 ver. 1. 3 , 2014 - 06 - 01 mechanical characteristics and ratings description condition value unit min t yp max mounting torue m3 screw and washer 0.59 0.69 0.78 nm flatness refer to figure 7 - 50 - 100 m weight - 6.15 - g figure 7 : flatness measurement position
cipos? i k cm 30f 60 h a datasheet 12 ver. 1. 3 , 2014 - 06 - 01 circuit of a typical application 3 - ph ac motor micro controller vdd line 5 or 3 . 3 v line signal for short - circuit protection u - phase current sensing v - phase current sensing w - phase current sensing u vss vdd lin 3 lin 2 lin 1 vfo itrip lo 3 lo 2 lo 1 ho 1 ho 2 ho 3 vb 1 vs 1 vb 2 vs 2 vb 3 vs 3 hin 3 hin 2 hin 1 nw ( 17 ) n v ( 18 ) w ( 20 ) v ( 21 ) u ( 22 ) p ( 23 ) ( 2 ) vb ( u ) ( 15 ) itrip ( 14 ) vfo ( 10 ) lin ( u ) ( 11 ) lin ( v ) ( 12 ) lin ( w ) ( 16 ) vss ( 13 ) vdd ( 4 ) vb ( v ) ( 6 ) vb ( w ) ( 7 ) hin ( u ) ( 8 ) hin ( v ) ( 9 ) hin ( w ) ( 1 ) vs ( u ) ( 3 ) vs ( v ) ( 5 ) vs ( w ) nu ( 19 ) nc ( 24 ) rbs 1 rbs 2 rbs 3 figure 8 : application circuit switching times definition hinx linx i cx v cx 0v v 0 0 0 0 0 t o t t on t r t o t on 0 t rr 0 figure 9 : switching times definition
cipos? i k cm 30f 60 h a datasheet 13 ver. 1. 3 , 2014 - 06 - 01 electrical characteristic 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 5 10 15 20 25 30 35 40 45 50 55 60 t j =25 v dd =15v v dd =20v ic, collector - emitter current [a] v ce (sat), collector - emitter voltage [v] typ. collector emitter saturation voltage 0 5 10 15 20 25 30 35 40 45 50 55 60 0 1 2 3 4 5 6 7 8 9 10 v dc =300v v dd =15v high side @t j =25 high side @t j =150 d low side @t j =25 dd low side @t j =150 d eon, turn on switching energy loss [mj] ic, collector current [a] typ. turn on switching energy loss 0 5 10 15 20 25 30 35 40 45 50 55 60 550 600 650 700 750 800 850 900 950 1000 v dc =300v v dd =15v high side @t j =25 dd high side @t j =150 d low side @t j =25 dd low side @t j =150 d t on , turn on propagation delay time [ns] ic, collector current [a] typ. turn on propagation delay time 0 5 10 15 20 25 30 35 40 45 50 55 60 100 200 300 400 500 600 700 800 high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 v dc =300v v dd =15v t c(off) , turn off switching time [ns] ic, collector current [a] typ. turn off switching time 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 5 10 15 20 25 30 35 40 45 50 55 60 v dd =15v t j =25 t j =150 ic, collector - emitter current [a] v ce (sat), collector - emitter voltage [v] typ. collector emitter saturation voltage 0 5 10 15 20 25 30 35 40 45 50 55 60 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 high side @t j =25 high side @t j =150 d low side @t j =25 dd low side @t j =150 d v dc =300v v dd =15v eoff, turn off switching energy loss [mj] ic, collector current [a] typ. turn off switching energy loss 0 5 10 15 20 25 30 35 40 45 50 55 60 0 100 200 300 400 500 600 700 800 900 1000 v dc =300v v dd =15v high side @t j =25 dd high side @t j =150 d low side @t j =25 dd low side @t j =150 d t c(on) , turn on switching time [ns] ic, collector current [a] typ. turn on switching time 0 5 10 15 20 25 30 35 40 45 50 55 60 50 100 150 200 250 300 350 400 450 500 high side @t j =25 dd high side @t j =150 d low side @t j =25 dd low side @t j =150 d v dc =300v v dd =15v t rr , reverse recovery time [ns] ic, collector current [a] typ. reverse recovery time 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 5 10 15 20 25 30 35 40 45 50 55 60 t j =25 t j =150 i f , emitter - collector current [a] v f , emitter - collector voltage [v] typ. emitter collector forward voltage 0 5 10 15 20 25 30 35 40 45 50 55 60 0 50 100 150 200 250 300 350 400 450 500 v dc =300v v dd =15v high side @t j =25 high side @t j =150 d low side @t j =25 dd low side @t j =150 erec, reverse recovery energy loss [uj] ic, collector current [a] typ. reverse recovery energy loss 0 5 10 15 20 25 30 35 40 45 50 55 60 800 1000 1200 1400 1600 1800 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 t off , turn off propagation delay time [ns] ic, collector current [a] typ. turn off propagation delay time 1e-7 1e-6 1e-5 1e-4 1e-3 0.01 0.1 1 10 100 1e-4 1e-3 0.01 0.1 1 10 d : duty ratio d=50% d=20% d=10% d=5% d=2% single pulse z thjc , transient thermal resistance [k/w] t p , pulse width [sec.] igbt transient thermal resistance at all six igbts operation
cipos? i k cm 30f 60 h a datasheet 14 ver. 1. 3 , 2014 - 06 - 01 package outline
cipos? i k cm 30f 60 h a datasheet 15 ver. 1. 3 , 2014 - 06 - 01 revision history previous version: datasheet ver. 1. 2 major changes since the last revision page or reference description of change 8 f igure 6 updated 1 4 package outline updated
trademarks of infineon technologies ag aurix?, c166?, canpak?, cipos?, cipurse?, coolgan?, coolmos?, coolset?, coolsic?, corecontrol?, crossave?, dave?, di - pol?, drblade?, easypim?, econobridge?, econodual?, econopack?, econopim?, eicedriver?, eupec?, fcos?, hitfet?, hybridpack?, isoface?, isopack?, i - wafer?, mipaq?, modstack?, my - d?, novalithic ?, omnitune?, optiga?, optimos?, origa?, powercode?, primarion?, primepack?, primestack?, profet?, pro - sil?, rasic?, real3?, reversave?, satric?, sieget?, sipmos?, smartlewis?, solid flash?, spoc?, tempfet?, thinq!?, trenchstop?, tricore?. other trademarks advance design system? (ads) of agilent technologies, amba?, arm?, multi - ice?, keil?, primecell?, realview?, thumb?, vision? of arm limited, uk. ansi? of american national standards institute. autosar? of autosar development partnership. bluetooth? o f bl uetooth sig inc. cat - iq? of dect forum. colossus?, firstgps? of trimble navigation ltd. emv? of emvco, llc (visa holdings inc.). epcos? of epcos ag. flexgo? of microsoft corporation. hyperterminal? of hilgraeve incorporated. mcs? of intel corp. iec? of com mission electrotechnique internationale. irda? of infrared data association corporation. iso? of international organization for standardization. matlab? of mathworks, inc. maxim? of maxim integrated products, inc. microtec?, nucleus? of mentor graphics cor poration. mipi? of mipi alliance, inc. mips? of mips technologies, inc., usa. murata? of murata manufacturing co., microwave office? (mwo) of applied wave research inc., omnivision? of omnivision technologies, inc. openwave? of openwave systems inc. red ha t? of red hat, inc. rfmd? of rf micro devices, inc. sirius? of sirius satellite radio inc. solaris? of sun microsystems, inc. sp ansion? of spansion llc ltd. symbian? of symbian software limited. taiyo yuden? of taiyo yuden co. teaklite? of ceva, inc. tektr onix? of tektronix inc. toko? of toko kabushiki kaisha ta. unix? of x/open company limited. verilog?, palladium? of cadence design systems, inc. vlynq? of texas instruments incorporated. vxworks?, wind river? of wind river systems, inc. zetex? of diodes ze tex . last trademarks update 2014 - 07 - 17 edition 2014 - 06 - 01 published by infineon technologies ag 81726 mnchen, germany ? infineon technologies ag 2015. all rights reserved. important notice the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (beschaffenheitsgarantie). with respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the prod uct, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non - infringement of intellectual property rights of any third party. in addition, any information given in this docu ment is subject to customers compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customers products and any use of the product of infineon technologies in customers applications. the data contained in this document is exclusively intended for technically trained staff. it is the responsibility of customers technical departments to evaluate the suitability of the product for the intended application and the completeness of the pro duct information given in this document with respect to such application. for further information on the product, technology, delivery terms and conditions and prices please contact your nearest infineon technologies office (www.infineon.com). warnings d ue to technical requirements products may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. except as otherwise explicitly approved by infineon technologies in a written docume nt signed by authorized representatives of infineon technologies, infineon technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal inj ury. www.infineon.com

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